RM0033 Rev 9 277/1381
RM0033 Digital-to-analog converter (DAC)
277
Refer to Section 2.3: Memory map for the register boundary addresses.
0x1C
DAC_
DHR8R2
Reserved DACC2DHR[7:0]
0x20
DAC_
DHR12RD
Reserved DACC2DHR[11:0] Reserved DACC1DHR[11:0]
0x24
DAC_
DHR12LD
DACC2DHR[11:0]
Reserved DACC1DHR[11:0] Reserved
0x28
DAC_
DHR8RD
Reserved DACC2DHR[7:0] DACC1DHR[7:0]
0x2C
DAC_
DOR1
Reserved DACC1DOR[11:0]
0x30
DAC_
DOR2
Reserved DACC2DOR[11:0]
0x34 DAC_SR
Reserved
DMAUDR2
Reserved
DMAUDR1
Reserved
Table 43. DAC register map (continued)
Offset Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
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