RM0033 Rev 9 925/1381
RM0033 Ethernet (ETH): media access control (MAC) with DMA controller
956
Ethernet MAC address 2 low register (ETH_MACA2LR)
Address offset: 0x0054
Reset value: 0xFFFF FFFF
The MAC address 2 low register holds the lower 32 bits of the 6-byte second MAC address
of the station.
Bit 31 AE: Address enable
When this bit is set, the address filters use the MAC address2 for perfect filtering. When
reset, the address filters ignore the address for filtering.
Bit 30 SA: Source address
When this bit is set, the MAC address 2 [47:0] is used for comparison with the SA fields of
the received frame.
When this bit is reset, the MAC address 2 [47:0] is used for comparison with the DA fields of
the received frame.
Bits 29:24 MBC: Mask byte control
These bits are mask control bits for comparison of each of the MAC address2 bytes. When
set high, the MAC core does not compare the corresponding byte of received DA/SA with the
contents of the MAC address 2 registers. Each bit controls the masking of the bytes as
follows:
– Bit 29: ETH_MACA2HR [15:8]
– Bit 28: ETH_MACA2HR [7:0]
– Bit 27: ETH_MACA2LR [31:24]
…
– Bit 24: ETH_MACA2LR [7:0]
Bits 23:16 Reserved, must be kept at reset value.
Bits 15:0 MACA2H: MAC address2 high [47:32]
This field contains the upper 16 bits (47:32) of the 6-byte MAC address2.
313029282726252423222120191817161514131211109876543210
MACA2L
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:0 MACA2L: MAC address2 low [31:0]
This field contains the lower 32 bits of the 6-byte second MAC address2. The content of this
field is undefined until loaded by the application after the initialization process.
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