Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
Programmers model
Bit descriptions
Figure 5-14: GICD_PIDR2 bit assignments
ArchRevReserved
31 8 7 4 3
DES_1
02
JEDEC
Table 5-16: GICD_PIDR2 bit descriptions
Bits Name Description
[31:8] - Reserved, RAZ
[7:4] ArchRev Identifies the version of the GIC architecture with which the Distributor complies:
0x3 GICv3
[3] JEDEC Indicates that a JEDEC-assigned JEP106 identity code is used
[2:0] DES_1 Bits[6:4] of the JEP106 identity code. Bits[3:0] of the JEP106 identity code are assigned to
GICD_PIDR1[7:4].
5.2.15 GICD_PIDR1, Peripheral ID1 register
This register returns byte[1] of the peripheral ID. The GICD_PIDR1 register is part of the set of
Distributor peripheral identification registers.
Configurations
This register is available in all configurations.
Attributes
Width 32-bit
Functional group See 5.2 Distributor registers (GICD/GICDA) summary on page 98 for the
address offset, type, and reset value of this register.
Usage constraints
There are no usage constraints.
Bit descriptions
Figure 5-15: GICD_PIDR1 bit assignments
PART_1DES_0Reserved
31 8 7 4 3 0
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