Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
Programmers model
5.10.2 FMU_ERR<n>CTLR, Error Record Control Register
This register controls which interrupt types are handled.
Configurations
This register is available in all configurations.
Attributes
Width 64-bit
Functional group See 5.10 FMU register summary on page 179 for the address offset, type,
and reset value of this register.
Usage constraints
Only accessible by Secure accesses.
Bit descriptions
Figure 5-62: FMU_ERR<n>CTLR bit assignments
E
D
Reserved
Reserved
FI
34 12
UI
Table 5-76: FMU_ERR<n>CTLR bit descriptions
Bits Name Description
[63:4] - Reserved, RAZ
[3] FI Fault Handling Interrupt (FHI) enables. When set to 1, it enables the fault handling interrupt for all
Corrected error events, and Uncorrected errors.
[2] UI Error Recovery Interrupt (ERI) enable. This bit controls whether an ERI is generated for all detected,
logged (FMU_ERR<n>CTLR.ED == 1) errors that are reported through this error record as UEs. That is:
•
Correctable errors that are reported as uncorrectable (FMU_ERR<n>CTLR.CE_EN == 0)
•
Uncorrectable errors
An error that is reported as a UE might generate both an ERI and an FHI.
[1] CE_EN Correctable error enable:
0 Treats correctable errors as uncorrectable errors (default)
1 Treats correctable errors and uncorrectable errors differently, and reports them separately
[0] ED Error reporting and logging enable:
0 Error reporting and logging is disabled for this record
1 Error reporting and logging is enabled for this record. This setting occurs at reset.
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