ARM CoreLink GIC-600AE

Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
Programmers model
5.10.11 FMU_STATUS, FMU Status register
This register indicates whether the FMU is idle.
Configurations
This register is available in all configurations.
Attributes
Width 32-bit
Functional group See 5.10 FMU register summary on page 179 for the address offset, type,
and reset value of this register.
Usage constraints
Only accessible by Secure accesses.
Bit descriptions
Figure 5-71: FMU_STATUS bit assignments
31 0
idle
1
Reserved
Table 5-85: FMU_STATUS bit descriptions
Bits Name Description
[31:1] - Reserved, RAZ
[0] idle Indicates if the FMU is idle:
0 FMU is busy processing the previous command
1 FMU is idle
5.10.12 FMU_ERRIDR, Error Record ID Register
This register defines the highest numbered index of the error records in this group.
Configurations
This register is available in all configurations.
Attributes
Width 32-bit
Functional group See 5.10 FMU register summary on page 179 for the address offset, type,
and reset value of this register.
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