Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
Operation
4.16.1 Connecting the chips
Use the following procedure to connect the chips in a multichip configuration.
Before you begin
The following restrictions apply when connecting or removing chips:
•
You must consider that data that is read from GICD_CHIPRn is valid only when
GICD_DCHIPR.PUP == 0, otherwise the data might be updating.
•
If you are connecting a new chip, the accesses must be done through a chip that is in the
Consistent state and not by writing to the new chip directly.
•
If you access GICD_CHIPSR while a chip is being connected, it shows RTS == Updating. The
GICD_DCHIPR.PUP is set, indicating that the Routing table is updating, so the values cannot be
trusted.
•
Adding or removing a chip when GICD_CTLR group enables are set is unpredictable. To check
that group enables are off, software must poll GICD_CTLR.RWP.
•
If any chip in the system has an ITS block, parameter its_type_support = full, then direct
injection LPI registers are not supported.
•
If you are connecting together multiple different instances of the GIC-600AE, the settings for
the following parameters must match in all chips:
◦ All affinity widths (max_affinity_width*)
◦ Number of SPI blocks supported (spi_blocks)
◦ LPI support type (lpi_support)
◦ Disable security settings (ds_value)
◦ Total number of chips supported (chip_count)
◦ Chip address width (chip_addr_width)
◦ Chip affinity select level (chip_affinity_select_level)
◦ Maximum number of cores on any single chip (max_pe_on_chip)
See the Arm
®
CoreLink
™
GIC-600AE Generic Interrupt Controller Configuration and Integration Manual
for information about configuration parameters and their options.
About this task
The procedure for connecting the chips in a multichip configuration is as follows:
Procedure
1. Ensure that the values of the chip_id tie-off input signals to all chips are correct.
2. Ensure that all Group enables in the GICD_CTLR register are disabled and GICD_CTLR.RWP ==
0.
3. Designate a chip, chip x, to own the Routing table.
You can designate a different chip later if necessary.
4. In a single register write, program GICD_CHIPRx with:
a)
GICD_CHIPRx.ADDR so that each chip can forward messages to chip x.
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