Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
Programmers model
Bit descriptions
Figure 5-66: FMU_PINGCTLR bit assignments
31 34 0
enable
1
ping_interval_diff ping_timeout_value
Reserved
16 15
Table 5-80: FMU_PINGCTLR bit descriptions
Bits Name Description
[31:16] ping_interval_diff Equal to (ping_interval − ping_timeout_value) in GIC clock cycles. See Figure 6-3: Ping mechanism
parameters on page 203 for more information.
The minimum value supported is 4.
[15:4] ping_timeout_value Timeout threshold value for ping timeouts in GIC clock cycles.
The minimum value supported is 20. The clock frequency difference and average network congestion must
be considered when programming this field.
[3:1] - Reserved, RAZ
[0] enabled When set to 1, it enables the GICD background ping engine. The GICD sends ping messages to each remote
GIC block, and expects a PING_ACK back within the specified timeout. If the PING_ACK is not received
within the specified timeout, then the GICD records this situation as an error. The GICD sequentially
moves to the next block and sends another ping message after ping_interval. If pings are enabled, then
FMU_PINGMASK.ping_mask field must unmask at least one remote GIC block.
See 6.2.6 Ping mechanisms on page 202 for more information.
5.10.7 FMU_PINGNOW, Ping Now register
This register specifies the remote GIC block to send the ping request to, and monitors whether that
block has acknowledged the ping.
Configurations
This register is available in all configurations.
Attributes
Width 32-bit
Functional group See 5.10 FMU register summary on page 179 for the address offset, type,
and reset value of this register.
Usage constraints
•
Only accessible by Secure accesses.
•
After a write to this register, poll FMU_STATUS.idle to ensure that the effect of the write is
complete.
•
Do not write to FMU_PINGNOW that corresponds to a powered-off block. See Power
management on page 208.
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