Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
Components and configuration
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[n] = SPI_ID − 32
Each SPI input wire has a corresponding spi_r wire after the synchronizer or capture flop that
can be used to create pulse extenders for edge-triggered interrupts that cross clock domains. If
SPI_INV[n] is set to 1, then the wire after the synchronizer is inverted with respect to the input.
3.5.3 SPI Collator power Q-Channel
The SPI Collator has a power Q-Channel interface that accepts requests from an external source,
such as the system power controller.
When the qactive_col signal is LOW, it indicates that all SPIs to the SPI Collator are in their idle
state of either 0 (active-HIGH) or 1 (active-LOW), so all messages are sent to the Distributor.
If the qactive_col signal is HIGH, the SPI Collator rejects any attempt to enter a low-power mode.
If the qreqn_col signal is LOW and is accepted, the SPI Collator enters low-power mode and the
AXI4-Stream channels to the Distributor are flushed out to ensure that there are no messages in
progress. When accepted, you can reset the SPI Collator safely without having to also reset the
Distributor. You can also reset the Distributor, but you must first complete the instructions that
are described in the subsections of section 4.6 Power management on page 56 before the
Distributor can be powered down.
When the SPI Collator and Distributor are both in the same domain, the power Q-Channel
interface is redundant and can be tied off.
In low-power mode, it is only safe to stop the SPI Collator clock if all edge-triggered interrupts into
the SPI Collator are pulse extended so that edges are not missed.
3.5.4 SPI Collator clock Q-Channel
The SPI Collator has a clock Q-Channel interface that accepts requests from an external clock
gating source, such as the system clock controller.
When the qactive_col_clk signal is LOW, it indicates that all SPI toggles and level transitions have
been passed to the Distributor, and that the SPI Collator does not require the clock.
If the qactive_col_clk signal is HIGH, the SPI Collator rejects any attempt to enter a low-power
mode.
If the qreqn_col_clk signal is LOW and is accepted, the SPI Collator enters low-power mode and
no new messages are sent to the Distributor until it enters low-power mode. If any interrupt line
changes state, the qactive_col_clk signal is asserted.
In low-power mode, it is only safe to stop the SPI Collator clock if all edge-triggered interrupts into
the SPI Collator are pulse extended so that edges are not missed.
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