Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
Programmers model
Attributes
Width 32-bit
Functional group See 5.10 FMU register summary on page 179 for the address offset, type,
and reset value of this register.
Usage constraints
Only accessible by Secure accesses.
Bit descriptions
Figure 5-65: FMU_KEY bit assignments
Table 5-79: FMU_KEY bit descriptions
Bits Name Description
[31:8] - Reserved, RAZ
[7:0] KEY Writing the correct key to this field enables the next write to any other writable FMU register to
succeed. See 6.2.7 Lock and key mechanism on page 205.
5.10.6 FMU_PINGCTLR, Ping Control Register
This register configures the error ping timing interval.
Configurations
This register is available in all configurations.
Attributes
Width 32-bit
Functional group See 5.10 FMU register summary on page 179 for the address offset, type,
and reset value of this register.
Usage constraints
Only accessible by Secure accesses.
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