Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
Components and configuration
An ITS can be placed anywhere in the system so that it is seen by devices that want to send MSIs.
However, the system is responsible for ensuring that the DeviceID reaching each ITS is not spoofed
by rogue software using either a<x>user signals or MSI-64. See 3.4 MSI-64 Encapsulator on page
40.
If the ITS is placed downstream of an ACE interconnect, care must be taken to
avoid system deadlock. For more information, see Functional integration in the Arm
®
CoreLink
™
GIC-600AE Generic Interrupt Controller Configuration and Integration Manual.
For more information about each inner block, see 4.9 ITS on page 60.
3.3.1 ITS ACE-Lite subordinate interface
The ITS AMBA
®
ACE-Lite subordinate interface has a configurable data width of 64 bits, 128 bits,
or 256 bits. The address and data widths between the subordinate and manager must match.
The ITS ACE-Lite subordinate port contains only the GITS_TRANSLATER register. See the Arm
®
Generic Interrupt Controller Architecture Specification, GIC architecture version 3 and version 4 for
more information.
If the bypass switch configuration option is selected, the port accepts all ACE-Lite traffic, and filters
accesses to the ITS based on an address match set by the target_address[ADDR_WIDTH−17:0]
ITS base address tie-off. Without the bypass switch, the upper bits of the address, 16 and above,
are ignored, and the system address decoders must ensure that only relevant ITS writes arrive
at the ITS. Writes to the ITS subordinate interface must set the awaddr[16:0] signal to 0x0040,
irrespective of whether the bypass switch is selected.
The ACE-Lite subordinate interface ignores all awatop, a<x>snoop, a<x>cache, a<x>domain, and
a<x>prot signals information other than to filter non-memory transactions such as atomics and
cache maintenance operations, to ensure that it replies in a protocol-compliant manner.
To generate an LPI, the ITS requires the DeviceID of the issuing manager. For PCIe, the DeviceID is
derived from the RequestorID.
The GIC-600AE supports two different methods for deriving the DeviceID with the ACE-Lite
subordinate interface:
•
When using the MSI-64 configuration parameter, the write to GITS_TRANSLATER is converted
to 64-bit accesses at an unmapped system address and the DeviceID is transferred in the upper
32 bits of the access. In this case, only burst length 1, 64-bit ACE-Lite writes are accepted.
•
When not using MSI-64, the DeviceID is transported on the awuser_s[did_width+2:3] signal
during the address (AW) phase of the register access. In this case, burst length 1, 32-bit or 16-
bit writes are accepted.
These two modes cannot be mixed on a single ITS. The DeviceID must be transferred using a
method that malicious software cannot spoof.
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