Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
Operation
Power up is the reverse of the powerdown sequence. However, you must ensure that the
Routing table is restored before other registers, else the behavior is unpredictable. Restoring
values to the Routing table that are not exactly the same as those values read out before a
reset, can cause unpredictable behavior.
Accesses to GICD_CTLR continue to be broadcast to the isolated chip, which
requests wakeup.
4.16.6 SPI operation for multichip operation
When the Routing table is set up, SPIs can be programmed through any connected chip, and
accesses to update stored values are routed over the cross-chip interface of the chip that owns the
SPIs.
SPIs can be routed to remote chips by programming the relevant GICD_IROUTERn register.
Remote chips are targeted using either Affinity2 or Affinity3, and the affinity level can be
discovered using GICD_CFGID.AFSL.
If SPIs within an SPI block are sent to multiple chips, we recommend that you do not read or write
the GICD_ISACTIVERn, GICD_ICACTIVERn, GICD_ISPENDRn, and GICD_ICPENDRn registers. It is
inefficient and these registers are not needed for immediate operation.
You can set interrupts to pending by writing to GICD_SETSPI_NSR, GICD_CLRSPI_NSR,
GICD_SETSPI_SR, and GICD_CLRSPI_SR. For efficient operation, we recommend that sources are
programmed to write SPI IDs that their chip owns. Other SPI IDs are supported if these SPIs are
owned somewhere in your system.
By default, the GIC-600AE does not guarantee that the pending bit has reached the point of
serialization for writes to set interrupts pending. This behavior means that there is a race between
the pending bit being set and an activate being processed by the GIC after the bresp signal asserts.
To ensure that writes always propagate to the point of serialization, set GICD_FCTLR.POS = 1.
SPI Collators in multichip
The SPI Collator wires are always connected to the lowest owned SPIs on the chip.
For example, if GICD_CHIPRn.SPI_BLOCK_MIN = 4, the SPI Collator wires to chip x drive SPI
IDs that start from 160, calculated by (4 × 32) + 32 = 160. Therefore, in a homogeneous 2-chip
system, each chip must not use more wires than 16 × (the number of configured SPI blocks).
SPI 1 of N
The GIC-600AE never sends a 1 of N SPI to another chip.
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