ARM CoreLink GIC-600AE

Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
Programmers model
Offset Name Type Reset Width Description Architecture
defined?
0xFFD8 GITS_PIDR6 RO 0x00 32 Peripheral ID 6 Register No
0xFFDC GITS_PIDR7 RO 0x00 32 Peripheral ID 7 Register No
0xFFE0 GITS_PIDR0 RO 0x94 32 Peripheral ID 0 Register No
0xFFE4 GITS_PIDR1 RO 0xB4 32 Peripheral ID 1 Register No
0xFFE8 GITS_PIDR2 RO 0x3B 32 Peripheral ID 2 Register No
0xFFEC GITS_PIDR3 RO 0x00 32 Peripheral ID 3 Register No
0xFFF0 GITS_CIDR0 RO 0x0D 32 Component ID 0 Register No
0xFFF4 GITS_CIDR1 RO 0xF0 32 Component ID 1 Register No
0xFFF8 GITS_CIDR2 RO 0x05 32 Component ID 2 Register No
0xFFFC GITS_CIDR3 RO 0xB1 32 Component ID 3 Register No
5.6.1 GITS_IIDR, ITS Implementer Identification Register
This register provides information about the implementer and revision of the ITS.
Configurations
This register is available in all configurations that have one or more ITS blocks.
Attributes
Width 32-bit
Functional group See 5.6 ITS control register summary on page 136 for the address offset,
type, and reset value of this register.
Usage constraints
There are no usage constraints.
Bit descriptions
Figure 5-29: GITS_IIDR bit assignments
Reserved RevisionVariant ImplementerProductID
31 024 1123 1220 19 16 15
Table 5-37: GITS_IIDR bit descriptions
Bits Name Function
[31:24] ProductID Indicates the product ID:
0x03 GIC-600AE
[23:20] - Reserved, RAZ
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