Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
Operation
4.7 Getting started
There are some basic tasks that you must complete before you can start to use the GIC-600AE.
Each Redistributor must be powered on using its GICR_PWRR register to enable the Redistributors
to be accessed, see 4.6.1 Redistributor power management on page 56 for more information.
When the GIC-600AE is powered up, it must be programmed as described in the GICv3 and GICv4
Software Overview.
4.8 Backwards compatibility
The GIC-600AE does not support legacy operation.
Legacy operation is indicated by GICD_CTLR.ARE_S or GICD_CTLR.ARE_NS == 0.
Therefore, SGIs and PPIs can be programmed only through the GICR register space, and SGIs are
not banked by the source core.
4.9 ITS
The GIC-600AE supports up to 16 Interrupt Translation Service (ITS) blocks in the system with a limit
of eight per chip. Each ITS is responsible for translating message-based interrupts from peripherals
into LPIs.
Each ITS is compliant with the GICv3 architecture and is responsible for mapping translation
requests with an EventID and DeviceID through to the physical INTID (pINTID) and Collection, a
group of interrupts, and finally to the target core. The following figure shows the ITS process.
Figure 4-2: ITS process
Device table
Interrupt Translation
Table (ITT) base, size
ITT base, size
ITT
pINTID, collection
EventID
base
size
Collection table
Target, address
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