ARM CoreLink GIC-600AE

Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
Programmers model
5.1.2 GIC-600AE register access and banking
The GIC-600AE uses an access and banking scheme for its registers.
For more information about the register access and banking scheme, see the Arm
®
Generic
Interrupt Controller Architecture Specification, GIC architecture version 3 and version 4.
The key characteristics of the scheme are:
•
Some registers such as the Distributor Control Register, GICD_CTLR, and the Redistributor
Control Register, GICR_CTLR, are banked by security that provides separate Secure and Non-
secure copies of the registers. A Secure access to the address, accesses the Secure copy of the
register. A Non-secure access to the address, accesses the Non-secure copy.
•
Some registers, such as the Interrupt Group Registers, GICD_IGROUPRn, are only accessible
using Secure accesses.
•
Non-secure accesses to registers, or parts of a register, which are only accessible to Secure
accesses are Read-As-Zero and Writes Ignored (RAZ/WI).
5.2 Distributor registers (GICD/GICDA) summary
The GIC-600AE Distributor functions are controlled through the Distributor registers identified
with the prefix GICD. The Distributor Alias registers are identified with the prefix GICDA.
The following table lists the Distributor registers in base offset order and provides a reference to
the register description that is described in either this document or the Arm
®
Generic Interrupt
Controller Architecture Specification, GIC architecture version 3 and version 4.
Address offsets are relative to the Distributor base address defined by the system memory map.
Offsets that are not shown or are marked as reserved, are Reserved and RAZ/WI. Accesses to
these offsets might be reported in error record 0 as a SYN_ACE_BAD access.
Table 5-2: Distributor (GICD/GICDA) register summary
Offset Name Type Reset Width Description Architecture
defined?
0x0000 GICD_CTLR RW Configuration
dependent
32 Distributor Control Register Yes
0x0004 GICD_TYPER RO Configuration
dependent
32 Interrupt Controller Type Register Yes
0x0008 GICD_IIDR RO 0x030nn43B
The nn value
depends on the
rxpy identifier.
32 Distributor Implementer Identification Register Yes
0x000C-
0x001C
- - - - Reserved -
0x0020 GICD_FCTLR RW 0x0 32 Function Control Register No
Copyright © 2018–2020, 2022 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 98 of 268