Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
About the GIC-600AE
2. About the GIC-600AE
The GIC-600AE is a Functional Safety (FuSa) variant of the GIC‑600. The GIC-600AE is a Generic
Interrupt Controller (GIC) that handles interrupts from peripherals to the cores and between cores.
The GIC-600AE supports a distributed microarchitecture containing several individual blocks that
are used to provide a flexible GIC implementation.
The GIC-600AE supports the GICv3 architecture. For more information, see the Arm
®
Generic
Interrupt Controller Architecture Specification, GIC architecture version 3 and version 4.
The microarchitecture scales from a single core to coherent multichip environments containing up
to 16 chips of up to 64 cores each.
All the GIC-600AE blocks communicate through fully credited AXI4-Stream interface channels. This
means that the interface only exerts transient backpressure on their ic<xy>tready signals, enabling
packets to be routed over any free-flowing interconnect. Channels can be routed over dedicated
AXI4-Stream buses, or over any available free-flowing transport layer in the system. A channel is
described as free-flowing when all transactions on that channel complete without a non-transient
dependency on any other transaction.
The GIC-600AE includes build scripts that can create appropriate levels of hierarchy for any
particular configuration. In small configurations, the distribution can be hidden and internally
optimized.
GIC‑600 information is unchanged, and information about the FuSa features
available in GIC-600AE can be found in 6. Functional Safety on page 193.
2.1 Components
The GIC-600AE comprises several significant blocks that work in combination to create a single
architecturally compliant GICv3 implementation within the system. The GIC-600AE top level can
have one of several optional structures.
The GIC-600AE consists of the following blocks:
Distributor
The Distributor is the hub of all the GIC communications and contains the functionality
for all Shared Peripheral Interrupts (SPIs) and Locality-specific Peripheral Interrupts (LPIs). It
is responsible for the entire GIC programmers model, except for the GITS_TRANSLATER
register, which is hosted in the Interrupt Translation Service (ITS) block.
The Distributor also maintains the coherency of the SPI register space in multichip
configurations.
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