Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
Components and configuration
Related information
Interrupt types on page 48
3.2.1 Redistributor AXI4-Stream interface
Each Redistributor has an upstream and downstream AXI4-Stream port for communicating with the
Distributor. This interface is either 16-bit or 64-bit wide and uses a fully credited protocol.
3.2.2 Redistributor GIC Stream Protocol interface
The GIC-600AE uses the GIC Stream Protocol interface to send interrupts to the core and receive
notifications when the core activates interrupts. The GIC Stream Protocol interface has a pair of
16-bit wide AXI4-Stream interfaces, that is, one upstream interface and one downstream interface.
The GIC Stream Protocol interface, also referred to as the GIC Stream interface, uses the GIC
Stream Protocol to pass interrupts and responses to the CPU interface inside each core.
See the GIC Stream Protocol interface appendix in the Arm
®
Generic Interrupt Controller
Architecture Specification, GIC architecture version 3 and version 4 for more information.
Table 3-6: GIC Stream Protocol interface signals
Signal Description
iri The iri prefix identifies the names of the downstream interface signals. These signals are sent by the GIC
Stream transmitter. On this interface, the Redistributor is the transmitter and the CPU interface is the
receiver.
icc The icc prefix identifies the names of the upstream interface signals. These signals are sent by the GIC
Stream receiver. On this interface, the CPU interface is the transmitter and the Redistributor is the receiver.
iritdest The Redistributor uses this signal to direct packets to one core within the cluster
icctid The cluster uses this signal to determine which core within the cluster sent a packet
iritwakeup The Redistributor uses this signal to indicate that it wants to send a message to a CPU interface in the
cluster
icctwakeup The cluster uses this signal to indicate that it wants to send a message to the Redistributor
Both the iritdest and icctid signals can support 64 cores that use packed binary encoding, as
opposed to one-hot encoding.
3.2.3 Redistributor Q-Channel
The Redistributor has a single Q-Channel input that is used to ensure that the Redistributor can be
safely clock gated hierarchically.
If the Redistributor is busy, actively processing interrupts or sending messages upstream or
downstream, the Q-Channel denies a quiescence request that it receives on the qreqn signal,
by asserting the qdeny signal. For more information, see the AMBA
®
Low Power Interface
Specification.
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