Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
Programmers model
Bit descriptions
Figure 5-35: GITS_PIDR2 bit assignments
ArchRevReserved
31 8 7 4 3
DES_1
02
JEDEC
Table 5-43: GITS_PIDR2 bit descriptions
Bits Name Description
[31:8] - Reserved, RAZ
[7:4] ArchRev Identifies the version of the GIC architecture with which the ITS complies:
0x3 GICv3
[3] JEDEC Indicates that a JEDEC-assigned JEP106 identity code is used
[2:0] DES_1 Bits[6:4] of the JEP106 identity code. Bits[3:0] of the JEP106 identity code are assigned to
GITS_PIDR1[7:4].
5.7 ITS translation register summary
Interrupts to be translated by the GIC-600AE Interrupt Translation Service (ITS) are identified by
EventIDs that are written to GITS_TRANSLATER, the ITS Translation Register.
This page does not exist in GIC-600AE configurations that do not support LPIs or that do not have
an ITS.
Table 5-44: ITS translation register summary
Offset Name Type Reset Width Description
0x0000-
0x003C
- - - - Reserved
0x0040 GITS_TRANSLATER WO - 32
ITS Translation Register. See the Arm
®
Generic Interrupt Controller
Architecture Specification, GIC architecture version 3 and version
4.
0x0044-
0xFFFC
- - - - Reserved
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