Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
Programmers model
Bits Name Description
[13:4] CGO Clock gate override. One bit per clock gate:
0 Use full clock gating
1 Leave clock running. If clock gates are not implemented, then you must use this value.
The clock gate bit assignments are:
Bit[13], CGO[9] Reserved
Bit[12], CGO[8] ITS communications block
Bit[11], CGO[7] Pending table search and control
Bit[10], CGO[6] Trace and debug
Bit[9], CGO[5] SGI and GICR registers
Bit[8], CGO[4] LPI cache and search
Bit[7], CGO[3] ACE-Lite manager interface
Bit[6], CGO[2] ACE-Lite subordinate interface
Bit[5], CGO[1] SPI registers and search
Bit[4], CGO[0] CPU communications block
[3:1] - Reserved, returns 0b000
[0] SIP Scrub in progress:
0 No scrub in progress
1 Scrub in progress
This bit is read and written by software. When a scrub is complete, the GIC clears the bit to 0.
5.2.5 GICD_SAC, Secure Access Control register
This register allows Secure software to control Non-secure access to GIC-600AE Secure features
by other software. It also controls whether Secure PMU events are visible to Non-secure software.
Configurations
This register is available in all configurations.
Attributes
Width 32-bit
Functional group See 5.2 Distributor registers (GICD/GICDA) summary on page 98 for the
address offset, type, and reset value of this register.
Usage constraints
Only accessible by Secure accesses.
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