Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
Functional Safety
Port Direction Granularity Description
dftcgen_fdc Input All domains Forces FDC clock gate enable, to ensure scanned flops get a clock
dftramhold_fdc Input All domains Redundant dftramhold signal
dftse_fdc Input All domains Scan enable for FDC clock flops
usr0_err Input Per block External IP user fault input 0
usr1_err Input Per block External IP user fault input 1
fmu_err_in[43:0] Input GICD block Redundant fault indicator inputs connecting outer GIC blocks to Distributor
fmu_err_out Output Outer
blocks
Redundant fault indicator outputs connecting outer GIC blocks to Distributor
fmu_fault_int Output GICD block Fault Handling Interrupt (FHI) from GICD FMU to Safety Island
fmu_fault_int_chk Output GICD block Redundant fmu_fault_int signal
fmu_err_int Output GICD block Error Recovery Interrupt (ERI) from GICD FMU to Safety Island
fmu_err_int_chk Output GICD block Redundant fmu_err_int signal
gicd_page_offset_chk Input GICD block Redundant gicd_page_offset tie-off signal. Only present in monolithic configurations.
This port is the inverted duplication of the gicd_page_offset signal.
its_transr_page_offset_chk Input GICD block Redundant its_transr_page_offset tie-off signal. Only present in monolithic
configurations. This port is the inverted duplication of the its_transr_page_offset
signal.
ppi_id_chk Input PPI block Redundant ppi_id tie-off signal
wake_request_chk[cpus
−1:0]
Output Wake
Request
block
Parity CHK for the wake_request signals. Odd parity.
fault_* Input/
output
Outer
blocks
See Table 6-12: fault_* tie-off signals on page 232 for more information
6.4.2 P-Channel and Q-Channel FuSa ports
The following interfaces add the parity extended chk signal bits.
In the following table, Granularity refers to the hierarchy or the block in which the ports are
relevant. See the AMBA
®
Low Power Interface Specification for more information about the parity
extended chk signal bits.
Table 6-4: P-Channel and Q-Channel FuSa ports
Port Direction Granularity Description
pwrqreqn_chk Input Redundant pwrqreqn port
pwrqactive_chk Output Redundant pwrqactive port
pwrqacceptn_chk Output Redundant pwrqacceptn port
pwrqdeny_chk Output
Q-Channel device interface for power control in each domain
Redundant pwrqdeny port
clkqreqn_chk Input Redundant clkqreqn port
clkqactive_chk Output Redundant clkqactive port
clkqacceptn_chk Output Redundant clkqacceptn port
clkqdeny_chk Output
Q-Channel device interface for clock control in each domain
Redundant clkqdeny port
preq_chk Input P-Channel device interface for the GICD block Redundant preq port
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