Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
Functional Safety
6.7.1 SECDED ECC data protection
SECDED ECC is a legacy GIC-600 feature.
For information about how to use this feature, see the GIC-600 sections of this document.
6.7.1.1 SECDED ECC fault reporting
SECDED ECC faults are reported by separate registers in both the legacy GIC-600 and the
GIC-600AE FuSa programmer's view.
The GIC-600 programmer's view reports all information about the RAM fault, including the fault
address. The GIC-600AE programmer's view is limited to reporting whether a Single Error Corrected
(SEC) or Double Error Detected (DED) fault occurred. You cannot retrieve the affected address from
the GIC-600AE programmer's view.
6.7.1.2 SBEs treated as fatal errors or corrected errors
FMEDA analysis might show that it is necessary to treat Single-Bit Errors (SBEs) as fatal errors.
This might be necessary if Multiple-Bit Errors (MBEs) are common, meaning there are more than
two errors in read data. If an MBE is encountered, conservative SECDED math tells us there is
approximately a 33 percent chance that the SECDED algorithm mistakes an MBE for an SBE and
corrects it erroneously.
The RAM scrubbers can be used to mitigate the chance of an MBE error by finding and correcting
SBEs before they have the chance to become Double-Bit Errors (DBEs) or MBEs. However, if all
SBEs are treated as fatal data, the achieved coverage is approximately 99.4 percent (measured).
SECs can be flagged as fatal by programming the GIC FMU to output an ERI interrupt instead
of an FHI interrupt. In this case, the correction is ignored, and all SEC faults are treated as fatal.
Correction cannot be disabled.
6.7.2 Address protection
Address protection must consider the protection of address decoders within the RAM decoder
macro themselves.
This is because the RAM is shared, and otherwise faults within the RAM macro address decoder
cause Common Mode Failure (CMF). This protection is achieved by calculating parity for the address
bits and writing the parity into the RAM along with the data.
The following figure shows how the address protection works.
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