ARM CoreLink GIC-600AE

Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
Operation
Main Cacheability value
(*BASER*.OuterCache)
Other Cacheability
value
(*BASER*.InnerCache)
arcache
signal
awcache
signal
arcache
signal
(DCC = 1)
awcache
signal
(DCC = 1)
Match 0b0011 0b0011 0b0011 0b00110b001, Normal Non-cacheable
No match 0b0011 0b0011 0b0011 0b0011
Match 0b0011 0b0011 0b1110 0b01100b010, Normal Cacheable RA Write-Through
No match 0b0011 0b0011 0b1110 0b0110
Match 0b1111 0b0111 0b1111 0b01110b011, Normal Cacheable RA Write-Back
No match 0b0011 0b0011 0b1111 0b0111
Match 0b0011 0b0011 0b1010 0b11100b100, Normal Cacheable WA Write-Through
No match 0b0011 0b0011 0b1010 0b1110
Match 0b1011 0b1111 0b1011 0b11110b101, Normal Cacheable WA Write-Back
No match 0b0011 0b0011 0b1011 0b1111
Match 0b0011 0b0011 0b1110 0b11100b110, Normal Cacheable WA RA Write-
Through
No match 0b0011 0b0011 0b1110 0b1110
Match 0b1111 0b1111 0b1111 0b11110b111, Normal Cacheable WA RA Write-Back
No match 0b0011 0b0011 0b1111 0b1111
The a<x>domain signal is driven according to the *BASER*.Shareability field unless the resultant
Cacheability is Device or Non-cacheable, in which case it becomes 0b11, system Shareable in
accordance with the AMBA
®
AXI and ACE Protocol Specification.
4.12 MSI-64
The MSI-64 Encapsulator can be used to combine the DeviceID into single memory access writes
to the GITS_TRANSLATER register in the ITS.
The ITS translates DeviceID/EventID pairs into LPI physical INTIDs.
A normal MSI/MSI64 write contains the EventID in the lower 16 bits or 32 bits of data. However,
the DeviceID must be transported using a different method. The DeviceID is often derived directly
from a PCIe RequestorID or System Memory Management Unit (SMMU) StreamID.
The GIC-600AE ITS supports two mechanisms:
awuser_*_s signal
The DeviceID arrives on sideband User signals. You must ensure that rogue software cannot
directly or indirectly, perform an access to the GITS_TRANSLATER register with a DeviceID
that matches a real device.
MSI-64
When configured to support MSI-64, the ITS expects the DeviceID to be in the upper 32 bits
of a 64-bit write to the GITS_TRANSLATER register.
To prevent rogue software accessing the GITS_TRANSLATER register and spoofing any
device, we recommend that the GITS_TRANSLATER register is moved to an arbitrary page
that is protected by the hypervisor.
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