Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
Functional Safety
When the recovery procedure is complete, the error from this error record can be cleared by
writing all ones to this register. Then the software should poll for FMU_STATUS.idle==1.
Prioritized FMU_ERR<n>STATUS registers
If a CE is followed by a UE before software has responded to the initial CE, the following sequence
occurs:
1.
The FMU_ERR<n>STATUS registers are updated to reflect the SM ID of the UE.
2.
The UE bit is set along with the CE bit.
3.
The OF bit is not set in this case. Overflow is only set when one of the following cases occurs:
a. Two UEs are received before software has responded, regardless of whether CEs were
received.
b. Two CEs are received back-to-back before software has responded.
To avoid a CE blocking a head-of-line UE, the GIC-600AE has separate UE and CE pipelines.
FMU idle
The APB port to the FMU is designed not to introduce backpressure by deasserting the pready
signal. This design feature prevents software lockup and always keeps the error records accessible.
There are several operations which take multiple clock cycles to complete within the FMU. The
FMU frees up the APB bus by asserting the pready signal to complete the APB transaction.
However, it might still be processing the previous request.
When software writes to one of the following FMU registers, it must poll for
FMU_STATUS.idle==1 before it issues another write to these registers:
•
FMU_ERR<n>STATUS
•
FMU_PINGNOW
•
FMU_SMEN
•
FMU_SMINJERR
Power management
The software can power down the Redistributor (PPI block) using the procedure that 4.6.1
Redistributor power management on page 56 describes, or the ITS could be powered down by
using the GITS_CTLR register. However, the powerdown state of the PPI block and the ITS block
affects certain functions of the FMU.
Writing to the following registers generates messages to the remote GIC block:
•
FMU_ERR<n>STATUS
•
FMU_PINGNOW
•
FMU_SMEN
•
FMU_SMINJERR
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