ARM CoreLink GIC-600AE

Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
Signal descriptions
ITS Q-Channel device interface for clock control
Signal Direction Description
qreqn Input
qacceptn Output
qdeny Output
qactive Output
Q-Channel device interface for clock gating of an ITS.
The qreqn signal is synchronized into the GIC-600AE.
This bus must be treated asynchronously.
qactive_gicd Output This signal is HIGH when the ITS requires its AXI4-Stream bus to the Distributor to be active. If the Distributor is
powered down, the system can use this signal to wakeup the Distributor.
Distributor Q-Channel device interface for clock control
Signal Direction Description
qreqn Input
qacceptn Output
qdeny Output
qactive Output
Q-Channel device interface for clock gating of the Distributor.
The qreqn signal is synchronized into the GIC-600AE.
This bus must be treated asynchronously.
PPI block Q-Channel device interface for clock control
Signal Direction Description
qreqn Input
qacceptn Output
qdeny Output
qactive Output
Q-Channel device interface for clock gating of a Redistributor.
The qreqn signal is synchronized into the GIC-600AE.
This bus must be treated asynchronously.
Q-Channel device interfaces for clock control
Signal Direction Description
[<domain_>]clkqreqn Input
[<domain_>]clkqacceptn Output
[<domain_>]clkqdeny Output
[<domain_>]clkqactive Output
Q-Channel device interface for clock gating of everything in the domain.
The [<domain_>]clkqreqn signal is synchronized into the GIC-600AE.
This bus must be treated asynchronously.
Q-Channel ADB-400 device interfaces for power control
Signal Direction Description
[<domain_>]pwrqreqn Input
[<domain_>]pwrqacceptn Output
[<domain_>]pwrqdeny Output
[<domain_>]pwrqactive Output
Q-Channel device interface for the CoreLink
™
ADB-400 AMBA
®
Domain Bridge power interface
within the domain.
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