EasyManua.ls Logo

Siemens SINAMICS G120D CU240D-2 DP - F01773 SI Motion P1 (CU): Test stop fail-safe digital output error

Siemens SINAMICS G120D CU240D-2 DP
980 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
SINAMICS G120D
List Manual (LH14), 01/2016, A5E33842313
849
4 Faults and alarms
4.2 List of faults and alarms
F01773 SI Motion P1 (CU): Test stop fail-safe digital output error
Message class: Safety monitoring channel has identified an error (10)
Reaction: NONE
Acknowledge: IMMEDIATELY (POWER ON)
Cause: A fault has occurred on processor 1 during the forced checking procedure (test stop) of the fail-safe digital output.
Fault value (r0949, interpret hexadecimal):
RRRVWXYZ hex:
R: Reserved.
V: Actual state of the DO channel concerned (see X) on processor 1 (corresponds to the states read back from the
hardware, bit 0 = DO 0, bit 1 = DO 1, etc.).
W: Required state of the DO channel concerned (see X, bit 0 = DO 0, bit 1 = DO 1, etc.).
X: DO channels involved, which indicate an error (bit 0 = DO 0, bit 1 = DO 1, etc.).
Y: Reason for the test stop fault.
Z: State of the test stop in which the fault has occurred.
Y: Reason for the test stop fault
Y = 1: MM side in incorrect test stop state (internal fault).
Y = 2: Expected states of the DOs were not fulfilled (CU240D-2: readback via DI 5 / CU250S-2 readback via DI 6).
Y = 3: Incorrect timer state on processor 1 (internal fault)
Y = 4: Expected states of the diag DOs were not fulfilled (CU240D-2: internal readback on processor 2 channel /
CU250S-2 readback via DI 6).
Y = 5: Expected states of the second diag DOs were not fulfilled (CU240D-2: internal readback on processor 1).
X and V indicate the DI or Diag-DO state dependent upon the reason for the fault (2, 4 or 5).
In the event of multiple test stop faults, the first one that occurred is shown.
Z: Test stop state and associated test actions
Z = 0 ... 3: Synchronization phase of test stop between processor 1 and processor 2 no switching operations
Z = 4: DO + OFF and DO - OFF
Z = 5: Check to see if states are as expected
Z = 6: DO + ON and DO - ON
Z = 7: Check to see if states are as expected
Z = 8: DO + OFF and DO - ON
Z = 9: Check to see if states are as expected
Z = 10: DO + ON and DO - OFF
Z = 11: Check to see if states are as expected
Z = 12: DO + OFF and DO - OFF
Z = 13: Check to see if states are as expected
Z = 14: End of test stop
Diag expected states in table format:
Test stop state: Expectation Mode 1 / Mode 2 / Mode 3 / Mode 4
5: 0/-/-/1
7: 0/-/-/0
9: 0/-/-/0
11: 1/-/-/1
13: 0/-/-/1
Second diag expected states in table format:
Test stop state: Expectation Mode 1 / Mode 2 / Mode 3 / Mode 4
5: -/-/-/1
7: -/-/-/0
9: -/-/-/1
11: -/-/-/0
13: -/-/-/1

Table of Contents

Related product manuals