ARM CoreLink GIC-600AE

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Arm

CoreLink™ GIC-600AE Generic Interrupt Controller

Technical Reference Manual

Document ID: 101206_0003_04_en

Issue: 04

Programmers model

Oﬀset Name Type Reset Width Description Architecture

deﬁned?

0x0204-

0x027C

- - - - Reserved -

0x0280 GICR_ICPENDR0 RW PPI wire dependent 32 Peripheral Clear Pending Register Yes

0x0284-

0x02FC

- - - - Reserved -

0x0300 GICR_ISACTIVER0 RW 0x0 32 Interrupt Set-Active Register Yes

0x0304-

0x037C

- - - - Reserved -

0x0380 GICR_ICACTIVER0 RW 0x0 32 Interrupt Clear-Active Register Yes

0x0384-

0x03FC

- - - - Reserved -

0x0400-

0x041C

GICR_IPRIORITYRn RW 0x0 32 Interrupt Priority Registers Yes

0x0420-

0x0BFC

- - - - Reserved -

0x0C00-

0x0C04

GICR_ICFGRn RW 0xAAAAAAAA when n ==

0x0 when n == 1.

32 Interrupt Conﬁguration Registers Yes

0x0C08-

0x0CFC

- - - - Reserved -

0x0D00 GICR_IGRPMODR0 RW 0x0 32 Interrupt Group Modiﬁer

Yes

0x0D04-

0x0DFC

- - - - Reserved -

0x0E00 GICR_NSACR RW 0x0 32 Non-secure Access Control

Yes

0x0E04-

0xBFFC

- - - - Reserved -

0xC000 GICR_MISCSTATUSR RO 0x0 32 Miscellaneous Status Register No

0xC004 - - - - Reserved -

0xC008 GICR_IERRVR RW 0x0 32 Interrupt Error Valid Register No

0xC00C - - - - Reserved -

0xC010 GICR_SGIDR RW - 64 SGI Default Register No

0xC018-

0xEFFC

- - - - Reserved -

0xF000 GICR_CFGID0 RO Conﬁguration dependent 32 Conﬁguration ID0 Register No

0xF004 GICR_CFGID1 RO Conﬁguration dependent 32 Conﬁguration ID1 Register No

Non-Conﬁdential

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