Infineon TriCore TC1.6P User Manual

TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-66
CALLI
Call Indirect
Description
Jump to the address specified by the contents of address register A[a]. In parallel with the jump save the caller’s
Upper Context to an available Context Save Area (CSA). Set register A[11] (return address) to the address of the
next instruction beyond the call.
Note:After CALLI, upper context registers are undefined except for A[10] and A[11].
Note:When the PSW is saved, the CDE bit is forced to '1'.
CALLIA[a] (RR)
if (FCX == 0) trap(FCU);
if (PSW.CDE) then if(cdc_increment()) then trap(CDO);
PSW.CDE = 1;
ret_addr = PC + 4;
tmp_FCX = FCX;
EA = {FCX.FCXS, 6'b0, FCX.FCXO, 6'b0};
new_FCX = M(EA, word);
M(EA,16 * word) = {PCXI, PSW, A[10], A[11], D[8], D[9], D[10], D[11], A[12], A[13], A[14], A[15], D[12], D[13],
D[14], D[15]};
PCXI.PCPN = ICR.CCPN;
PCXI.PIE = ICR.IE;
PCXI.UL = 1;
PCXI[19:0] = FCX[19:0];
FCX[19:0] = new_FCX[19:0];
PC = {A[a][31:1], 1'b0};
A[11] = ret_addr[31:0];
if (tmp_FCX == LCX) trap(FCD);
Status Flags
Examples
calli a2
C Not changed by this instruction but read by the instruction.
V Not changed by this instruction but read by the instruction.
SV Not changed by this instruction but read by the instruction.
AV Not changed by this instruction but read by the instruction.
SAV Not changed by this instruction but read by the instruction.
31
-
28 27
00
H
20 19
-
18 17
-
16 15
-
12 11
a
8 7
2D
H
0

Infineon TriCore TC1.6P Specifications

General

Brand	Infineon
Model	TriCore TC1.6P
Category	Microcontrollers
Language	English