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Infineon TriCore TC1.6P - Debug

Infineon TriCore TC1.6P
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TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-81
DEBUG
Debug
Description
If the Debug mode is enabled (DBGSR.DE == 1), cause a Debug Event; otherwise execute a NOP.
DEBUG(SR)
DEBUG(SYS)
-
Status Flags
Examples
debug
See Also
RFM
If the Debug mode is enabled (DBGSR.DE == 1), cause a Debug event; otherwise execute a NOP.
-
C Not set by this instruction.
V Not set by this instruction.
SV Not set by this instruction.
AV Not set by this instruction.
SAV Not set by this instruction.
debug
15
0A
H
12 11
-
8 7
00
H
0
31
-
28 27
04
H
22 21
-
12 11
-
8 7
0D
H
0

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