TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-421
• LD.W - Load Word
• LDLCX - Load Lower Context
• LDMST - Load-Modify-Store
• LDUCX - Load Upper Context
• LEA - Load Effective Address
• LOOP - Loop
• LOOPU - Loop Unconditional
• LT.A - Less Than Address
• MFCR - Move From Core Register
• MOV.A - Move Value to Address Register
• MOV.AA - Move Address from Address Register
• MOV.D - Move Address to Data Register
• MOVH.A - Move High to Address
• MTCR - Move To Core Register
• NE.A - Not Equal Address
• NEZ.A - Not Equal Zero Address
• NOP - No Operation
• RESTORE - Restore
• RET - Return from Call
• RFE - Return From Exception
• RFM - Return From Monitor
• RSLCX - Restore Lower Context
• ST.A - Store Word from Address Register
• ST.B - Store Byte
• ST.D - Store Double-word
• ST.DA - Store Double-word from Address Registers
• ST.H - Store Half-word
• ST.Q - Store Half-word Signed Fraction
• ST.T - Store Bit
• ST.W - Store Word
• STLCX - Store Lower Context
• STUCX - Store Upper Context
•
SUB.A - Subtract Address
• SVLCX - Save Lower Context
• SWAP.W - Swap with Data Register
• SWAPMSK.W - Swap under Mask
• SYSCALL - System Call
• TRAPSV - Trap on Sticky Overflow
• TRAPV - Trap on Overflow
• WAIT - Wait
3.3.2 List of IP Instructions
• ABS - Absolute Value
• ABS.B - Absolute Value Packed Byte
• ABS.H - Absolute Value Packed Half-word
• ABSDIF - Absolute Value of Difference
• ABSDIF.B - Absolute Value of Difference Packed Byte
• ABSDIF.H - Absolute Value of Difference Packed Half-word
• ABSDIFS - Absolute Value of Difference with Saturation
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