Infineon TriCore TC1.6P - MADD.U - Multiply-Add Unsigned; MADDS.U - Multiply-Add Unsigned, Saturated

TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-196
MADD.U
Multiply-Add Unsigned
MADDS.U
Multiply-Add Unsigned, Saturated
Description
Multiply two unsigned 32-bit integers, add the product to an unsigned 32-bit or 64-bit integer, and put the result
into a 32-bit or 64-bit register. The value const9 is zero-extended before the multiplication is performed. The
MADDS.U result is saturated on overflow.
MADD.UE[c], E[d], D[a], const9 (RCR)
64 + (32 * K9) --> 64 unsigned
result = E[d] + (D[a] * zero_ext(const9)); // unsigned operators
E[c] = result[63:0];
MADD.UE[c], E[d], D[a], D[b] (RRR2)
32 + (32 * 32) --> 32 unsigned
result = E[d] + (D[a] * D[b]); // unsigned operators
E[c] = result[63:0];
MADDS.UD[c], D[d], D[a], const9 (RCR)
32 + (32 * K9) --> 32 unsigned saturated
result = D[d] + (D[a] * zero_ext(const9)); // unsigned operators
D[c] = suov(result, 32);
MADDS.UE[c], E[d], D[a], const9 (RCR)
64 + (32 * K9) --> 64 unsigned saturated
result = E[d] + (D[a] * zero_ext(const9)); // unsigned operators
E[c] = suov(result, 64);
MADDS.UD[c], D[d], D[a], D[b] (RRR2)
32 + (32 * 32) --> unsigned saturated
31
c
28 27
d
24 23
02
H
21 20
const9
12 11
a
8 7
13
H
0
31
c
28 27
d
24 23
68
H
16 15
b
12 11
a
8 7
03
H
0
31
c
28 27
d
24 23
04
H
21 20
const9
12 11
a
8 7
13
H
0
31
c
28 27
d
24 23
06
H
21 20
const9
12 11
a
8 7
13
H
0