Infineon TriCore TC1.6P - AND.EQ - Equal Accumulating

TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-34
AND.EQ
Equal Accumulating
Description
Compute the logical AND of D[c][0] and the boolean result of the equality comparison operation on the contents
of data register D[a] and either data register D[b] (instruction format RR) or const9 (instruction RC). Put the result
in D[c][0]. All other bits in D[c] are unchanged. The const9 value is sign-extended.
AND.EQD[c], D[a], const9 (RC)
D[c] = {D[c][31:1], D[c][0] AND (D[a] == sign_ext(const9))};
AND.EQD[c], D[a], D[b] (RR)
D[c] = {D[c][31:1], D[c][0] AND (D[a] == D[b])};
Status Flags
Examples
and.eq d3, d1, d2
and.eq d3, d1, #126
See Also
OR.EQ, XOR.EQ
C Not set by this instruction.
V Not set by this instruction.
SV Not set by this instruction.
AV Not set by this instruction.
SAV Not set by this instruction.
31
c
28 27
20
H
21 20
const9
12 11
a
8 7
8B
H
0
31
c
28 27
20
H
20 19
-
18 17
-
16 15
b
12 11
a
8 7
0B
H
0