Infineon TriCore TC1.6P - LD.D - Load Double-Word

TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-157
LD.D
Load Double-word
Description
Load the double-word contents of the memory location specified by the addressing mode into the extended data
register E[a]. The least-significant word of the double-word value is loaded into the even register (D[n]) and the
most-significant word is loaded into the odd register (D[n+1]).
LD.DE[a], off18 (ABS)(Absolute Addressing Mode)
EA = {off18[17:14], 14b'0, off18[13:0]};
E[a] = M(EA, doubleword);
LD.DE[a], A[b], off10 (BO)(Base + Short Offset Addressing Mode)
EA = A[b] + sign_ext(off10);
E[a] = M(EA, doubleword);
LD.DE[a], P[b] (BO)(Bit-reverse Addressing Mode)
index = zero_ext(A[b+1][15:0]);
incr = zero_ext(A[b+1][31:16]);
EA = A[b] + index;
D[a] = zero_ext(M(EA, doubleword));
new_index = reverse16(reverse16(index) + reverse16(incr));
A[b+1] = {incr[15:0], new_index[15:0]};
LD.DE[a], P[b], off10 (BO)(Circular Addressing Mode)
index = zero_ext(A[b+1][15:0]);
length = zero_ext(A[b+1][31:16]);
EA0 = A[b] + index;
EA2 = A[b] + (index + 2) % length;
EA4 = A[b] + (index + 4) % length;
EA6 = A[b] + (index + 6) % length;
EA = {M(EA6, halfword), M(EA4, halfword), M(EA2, halfword), M(EA0, halfword)};
new_index = index + sign_ext(off10);
31
off18[9:6]
28 27
01
H
26 25
off18[13:10]
22 21
off18[5:0]
16 15
off18[17:14]
12 11
a
8 7
85
H
0
31
off10[9:6]
28 27
25
H
22 21
off10[5:0]
16 15
b
12 11
a
8 7
09
H
0
31
-
28 27
05
H
22 21
-
16 15
b
12 11
a
8 7
29
H
0
31
off10[9:6]
28 27
15
H
22 21
off10[5:0]
16 15
b
12 11
a
8 7
29
H
0