Infineon TriCore TC1.6P - EQ.B - Equal Packed Byte; EQ.H - Equal Packed Half-Word; EQ.W - Equal Packed Word

TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-98
EQ.B
Equal Packed Byte
EQ.H
Equal Packed Half-word
EQ.W
Equal Packed Word
Description
Compare each byte (EQ.B), half-word (EQ.H) or word (EQ.W) of D[a] with the corresponding byte, half-word or
word of D[b].
In each case, if the two are equal, set the corresponding byte, half-word or word of D[c] to all ones; otherwise set
the corresponding byte, half-word or word of D[c] to all zeros.
EQ.BD[c], D[a], D[b] (RR)
D[c][31:24] = (D[a][31:24] == D[b][31:24]) ? 8’hFF : 8’h00;
D[c][23:16] = (D[a][23:16] == D[b][23:16]) ? 8’hFF : 8’h00;
D[c][15:8] = (D[a][15:8] == D[b][15:8]) ? 8’hFF : 8’h00;
D[c][7:0] = (D[a][7:0] == D[b][7:0]) ? 8’hFF : 8’h00;
EQ.HD[c], D[a], D[b] (RR)
D[c][31:16] = (D[a][31:16] == D[b][31:16]) ? 16’hFFFF : 16’h0000;
D[c][15:0] = (D[a][15:0] == D[b][15:0]) ? 16’hFFFF : 16’h0000;
EQ.WD[c], D[a], D[b] (RR)
D[c] = (D[a] == D[b]) ? 32’hFFFFFFFF ? 32’h00000000;
Status Flags
C Not set by these instructions.
V Not set by these instructions.
SV Not set by these instructions.
AV Not set by these instructions.
SAV Not set by these instructions.
31
c
28 27
50
H
20 19
-
18 17
-
16 15
b
12 11
a
8 7
0B
H
0
31
c
28 27
70
H
20 19
-
18 17
-
16 15
b
12 11
a
8 7
0B
H
0
31
c
28 27
90
H
20 19
-
18 17
-
16 15
b
12 11
a
8 7
0B
H
0