Infineon TriCore TC1.6P - XOR - Bitwise XOR

TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-391
XOR
Bitwise XOR
Description
Compute the bitwise exclusive OR of the contents of data register D[a] and the contents of either data register D[b]
(instruction format RR) or const9 (instruction format RC). Put the result in data register D[c]. The value const9 is
zero-extended to 32-bits.
XORD[c], D[a], const9 (RC)
D[c] = D[a] ^ zero_ext(const9);
XORD[c], D[a], D[b] (RR)
D[c] = D[a] ^ D[b];
XORD[a], D[b] (SRR)
Status Flags
Examples
xor d3, d1, d2
xor d3, d1, #126
See Also
AND, ANDN, NAND, NOR, NOT (16-bit), OR, ORN, XNOR
Compute the bitwise exclusive OR of the contents of data register D[a] and the contents of data register D[b]. Put
the result in data register D[a].
D[a] = D[a] ^ D[b];
C Not set by this instruction.
V Not set by this instruction.
SV Not set by this instruction.
AV Not set by this instruction.
SAV Not set by this instruction.
xor d3, d2
31
c
28 27
0C
H
21 20
const9
12 11
a
8 7
8F
H
0
31
c
28 27
0C
H
20 19
-
18 17
-
16 15
b
12 11
a
8 7
0F
H
0
15
b
12 11
a
8 7
C6
H
0