Infineon TriCore TC1.6P - MADD.F - Multiply Add Float

TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-410
MADD.F
Multiply Add Float
Description
Multiplies D[a] and D[b] and adds the product to D[d]. The result is put in D[c]. The operands and result are floating-
point numbers. If an operand is a NaN (quiet or signalling), then the return result will be the quiet NaN 7FC00000
H
.
MADD.FD[c], D[d], D[a], D[b] (RRR)
arg_a = denorm_to_zero(f_real(D[a]);
arg_b = denorm_to_zero(f_real(D[b]);
arg_c = denorm_to_zero(f_real(D[d]);
if(is_nan(D[a]) OR is_nan(D[b]) OR is_nan(D[d])) then result = QUIET_NAN;
else if(is_inf(D[a]) AND is_zero(D[b])) then result = MUL_NAN;
else if(is_zero(D[a]) AND is_inf(D[b])) then result = MUL_NAN;
else if(((is_neg_inf(D[a]) AND is_neg_inf(D[b])) OR
((is_pos_inf(D[a]) AND is_pos_inf(D[b]))) AND
is_neg_inf(D[d])) then result = ADD_NAN;
else if(((is_neg_inf(D[a]) AND is_pos_inf(D[b])) OR
((is_pos_inf(D[a]) AND is_neg_inf(D[b]))) AND
is_pos_inf(D[b])) then result = ADD_NAN;
else {
precise_mul_result = mul(arg_a, arg_b);
precise_result = add(precise_mul_result, arg_c);
normal_result = denorm_to_zero(precise_result);
rounded_result = ieee754_round(normal_result, PSW.RM);
result = ieee754_32bit_format(rounded_result);
}
D[c] = result[31:0];
Exception Flags
FS if(set_FI OR set_FV OR set_FU or set_FX) then PSW.FS = 1 else PSW.FS = 0;
FI if(is_s_nan(D[a]) OR is_s_nan(D[b]) OR is_s_nan(D[d]) OR (result == ADD_NAN) OR (result ==
MUL_NAN)) then set_FI = 1 else set_FI = 0;
if(set_FI) then PSW.FI = 1;
FV if(rounded_result >= 2
128
) then set_FV = 1 else set_FV = 0;
if(set_FV) then PSW.FV = 1;
FZ Not set by this instruction.
FU if(fp_abs(precise_result) < 2
-126
) then set_FU = 1 else set_FU = 0;
if(set_FU) then PSW.FU = 1;
31
c
28 27
d
24 23
06
H
20 19
-
18 17
1
H
16 15
b
12 11
a
8 7
6B
H
0