Infineon TriCore TC1.6P - ADDC - Add with Carry

TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-18
ADDC
Add with Carry
Description
Add the contents of data register D[a] to the contents of either data register D[b] (instruction format RR) or const9
(instruction format RC) plus the carry bit, and put the result in data register D[c]. The operands are treated as 32-
bit integers. The value const9 is sign-extended before the addition is performed. The PSW carry bit is set to the
value of the ALU carry out.
ADDCD[c], D[a], const9 (RC)
result = D[a] + sign_ext(const9) + PSW.C;
D[c] = result[31:0];
carry_out = carry(D[a],sign_ext(const9),PSW.C);
ADDCD[c], D[a], D[b] (RR)
result = D[a] + D[b] + PSW.C;
D[c] = result[31:0];
carry_out = carry(D[a], D[b], PSW.C);
Status Flags
Examples
addc d3, d1, d2
addc d3, d1, #126
See Also
ADD, ADDI, ADDIH, ADDS, ADDS.U, ADDX
C PSW.C = carry_out;
V overflow = (result > 7FFFFFFF
H
) OR (result < -80000000
H
);
if (overflow) then PSW.V = 1 else PSW.V = 0;
SV if (overflow) then PSW.SV = 1 else PSW.SV = PSW.SV;
AV advanced_overflow = result[31] ^ result[30];
if (advanced_overflow) then PSW.AV = 1 else PSW.AV = 0;
SAV if (advanced_overflow) then PSW.SAV = 1 else PSW.SAV = PSW.SAV;
31
c
28 27
05
H
21 20
const9
12 11
a
8 7
8B
H
0
31
c
28 27
05
H
20 19
-
18 17
-
16 15
b
12 11
a
8 7
0B
H
0