Infineon TriCore TC1.6P - LD.DA - Load Double-Word to Address Register

TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-159
LD.DA
Load Double-word to Address Register
Description
Load the double-word contents of the memory location specified by the addressing mode into an address register
pair A[a]. The least-significant word of the double-word value is loaded into the even register (A[a]) and the most-
significant word is loaded into the odd register (A[a+1]).
Note:If the target register is modified by the addressing mode, the result is undefined.
LD.DAP[a], off18 (ABS)(Absolute Addressing Mode)
EA = {off18[17:14], 14b'0, off18[13:0]};
P[a] = M(EA, doubleword);
LD.DA P[a], A[b], off10 (BO)(Base + Short Offset Addressing Mode)
EA = A[b] + sign_ext(off10);
P[a] = M(EA, doubleword);
LD.DAP[a], P[b] (BO)(Bit-reverse Addressing Mode)
index = zero_ext(A[b+1][15:0]);
incr = zero_ext(A[b+1][31:16]);
EA = A[b] + index;
P[a] = M(EA, doubleword);
new_index = reverse16(reverse16(index) + reverse16(incr));
A[b+1] = {incr[15:0], new_index[15:0]};
LD.DAP[a], P[b], off10 (BO)(Circular Addressing Mode)
index = zero_ext(A[b+1][15:0]);
length = zero_ext(A[b+1][31:16]);
EA0 = A[b] + index;
EA4 = A[b] + (index + 4) % length;
P[a] = {M(EA4, word), M(EA0, word)};
new_index = index + sign_ext(off10);
new_index = new_index < 0 ? new_index + length : new_index % length;
31
off18[9:6]
28 27
03
H
26 25
off18[13:10]
22 21
off18[5:0]
16 15
off18[17:14]
12 11
a
8 7
85
H
0
31
off10[9:6]
28 27
27
H
22 21
off10[5:0]
16 15
b
12 11
a
8 7
09
H
0
31
-
28 27
07
H
22 21
-
16 15
b
12 11
a
8 7
29
H
0
31
off10[9:6]
28 27
17
H
22 21
off10[5:0]
16 15
b
12 11
a
8 7
29
H
0