Infineon TriCore TC1.6P - RSUB - Reverse-Subtract

TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-321
RSUB
Reverse-Subtract
Description
Subtract the contents of data register D[a] from the value const9 and put the result in data register D[c]. The
operands are treated as 32-bit integers. The value const9 is sign-extended before the subtraction is performed.
RSUBD[c], D[a], const9 (RC)
result = sign_ext(const9) - D[a];
D[c] = result[31:0];
RSUBD[a] (SR)
Status Flags
Examples
rsub d3, d1, #126
See Also
RSUBS, RSUBS.U
Subtract the contents of data register D[a] from zero and put the result in data register D[a]. The operand is
treated as a 32-bit integer.
result = 0 - D[a];
D[a] = result[31:0];
C Not set by this instruction.
V overflow = (result > 7FFFFFFF
H
) OR (result < -80000000
H
);
if (overflow) then PSW.V = 1 else PSW.V = 0;
SV if (overflow) then PSW.SV = 1 else PSW.SV = PSW.SV;
AV advanced_overflow = result[31] ^ result[30];
if (advanced_overflow) then PSW.AV = 1 else PSW.AV = 0;
SAV if (advanced_overflow) PSW.SAV = 1 else PSW.SAV = PSW.SAV;
rsub d1
31
c
28 27
08
H
21 20
const9
12 11
a
8 7
8B
H
0
15
05
H
12 11
a
8 7
32
H
0