TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set Overview
V1.0 2013-07
User Manual (Volume 2) 2-16
Figure 2-15 LT.A Comparison Operation
There are comparison instructions for equal (EQ.A), not equal (NE.A), less than (LT.A), and greater than or equal
to (GE.A).
As with the comparison instructions using the data registers, comparison conditions not explicitly provided in the
instruction set can be obtained by swapping the two operand registers (Table 2-2).
In addition to these instructions, instructions that test whether an address register is equal to zero (EQZ.A), or not
equal to zero (NEZ.A), are supported. These instructions are useful to test for null pointers, a frequent operation
when dealing with linked lists and complex data structures.
2.9 Branch Instructions
Branch instructions change the flow of program control by modifying the value in the PC register.
There are two types of branch instructions: conditional and unconditional. Whether a conditional branch is taken
depends on the result of a Boolean compare operation.
2.9.1 Unconditional Branch
There are three groups of unconditional branch instructions:
• Jump instructions
• Jump and Link instructions
• Call and Return instructions
A Jump instruction simply loads the Program Counter with the address specified in the instruction. A Jump and
Link instruction does the same, and also stores the address of the next instruction in the Return Address (RA)
register A[11]. A jump and Link instruction can be used to implement a subroutine call when the called routine does
not modify any of the caller’s non-volatile registers.
The Call instructions differ from a Jump and Link in that the call instructions save the caller’s registers upper
context in a dynamically-allocated save area.
The Return instruction, in addition to performing the return jump, restores the upper context.
Each group of unconditional jump instructions contains separate instructions that differ in how the target address
is specified. There are instructions using a relative 24-bit signed displacement (J, JL, and CALL), instructions using
a 24-bit field as an absolute address (JA, JLA, and CALLA), and instructions using the address contained in an
address register (JI, JLI, CALLI, RET, and RFE).
There are additional 16-bit instructions for a relative jump using an 8-bit displacement (J), an instruction for an
indirect jump (JI), and an instruction for a return (RET).
Table 2-2 Operation Equivalents
Implicit Comparison Operation TriCore Equivalent Comparison Operation
LE.A D[c], A[a], A[b] GE.A D[c], A[b], A[a]
GT.A D[c], A[a], A[b] LT.A D[c], A[b], A[a]
TC1058B
A
A[a] A[b]
A < B ?
B
D[c]
0
31
0
31
0
31
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