TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-299
OR.AND.T
Accumulating Bit Logical OR-AND
OR.ANDN.T
Accumulating Bit Logical OR-AND-Not
OR.NOR.T
Accumulating Bit Logical OR-NOR
OR.OR.T
Accumulating Bit Logical OR-OR
Description
Compute the logical operation (AND, ANDN, NOR or OR as appropriate) of the value of bit pos1 of data register
D[a], and bit pos2 of D[b]. Compute the logical OR of that result and bit [0] of D[c]. Put the result back in bit [0] of
D[c]. All other bits in D[c] are unchanged.
OR.AND.TD[c], D[a], pos1, D[b], pos2 (BIT)
D[c] = {D[c][31:1], D[c][0] OR (D[a][pos1] AND D[b][pos2])};
OR.ANDN.TD[c], D[a], pos1, D[b], pos2 (BIT)
D[c] = {D[c][31:1], D[c][0] OR (D[a][pos1] AND !D[b][pos2])};
OR.NOR.TD[c], D[a], pos1, D[b], pos2 (BIT)
D[c] = {D[c][31:1], D[c][0] OR !(D[a][pos1] OR D[b][pos2])};
OR.OR.TD[c], D[a], pos1, D[b], pos2 (BIT)
D[c] = {D[c][31:1], D[c][0] OR (D[a][pos1] OR D[b][pos2])};
Status Flags
C Not set by these instructions.
V Not set by these instructions.
SV Not set by these instructions.
AV Not set by these instructions.
31
c
28 27
pos2
23 22
00
H
21 20
pos1
16 15
b
12 11
a
8 7
C7
H
0
31
c
28 27
pos2
23 22
03
H
21 20
pos1
16 15
b
12 11
a
8 7
C7
H
0
31
c
28 27
pos2
23 22
02
H
21 20
pos1
16 15
b
12 11
a
8 7
C7
H
0
31
c
28 27
pos2
23 22
01
H
21 20
pos1
16 15
b
12 11
a
8 7
C7
H
0