TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-407
FTOU
Float to Unsigned
Description
Converts the contents of data register D[a] from floating-point format to a 32-bit unsigned integer format. The
rounded result is put in data register D[c].
FTOUD[c], D[a] (RR)
if(is_nan(D[a])) then result = 0;
else if(f_real(D[a]) > 2
32
-1) then result = FFFFFFFF
H
;
else if(f_real(D[a]) < 0.0) then result = 0;
else result = round_to_unsigned(D[a], PSW.RM);
D[c] = result[31:0];
Exception Flags
Examples
ftou d2, d1
See Also
UTOF, FTOUZ
FS if(set_FI OR set_FX) then PSW.FS = 1 else PSW.FS = 0;
FI if((f_real(D[a]) > 2
32
-1) OR (f_real(D[a]) < 0.0) OR is_nan(D[a])) then set_FI = 1 else set_FI = 0;
if(set_FI) then PSW.FI = 1;
FV Not set by this instruction.
FZ Not set by this instruction.
FU Not set by this instruction.
FX if(f_real(D[a]) != u_real(result)) then set_FX = 1 else set_FX = 0;
if(set_FX AND !set_FI) then PSW.FX = 1;
31
c
28 27
12
H
20 19
-
18 17
1
H
16 15
-
12 11
a
8 7
4B
H
0
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