TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-45
BMERGE
Bit Merge
Description
Take the lower 16-bits of data register D[a] and move them to the odd bit positions of data register D[c]. The lower
16-bits of data register D[b] are moved to the even bit positions of data register D[c]. The upper 16-bits of D[a] and
D[b] are not used.
This instruction is typically used to merge two bit streams such as commonly found in a convolutional coder.
BMERGED[c], D[a], D[b] (RR)
D[c][31:24] = {D[a][15], D[b][15], D[a][14], D[b][14], D[a][13], D[b][13], D[a][12], D[b][12]};
D[c][23:16] = {D[a][11], D[b][11], D[a][10], D[b][10], D[a][9], D[b][9], D[a][8], D[b][8]};
D[c][15:8] = {D[a][7], D[b][7], D[a][6], D[b][6], D[a][5], D[b][5], D[a][4], D[b][4]};
D[c][7:0] = {D[a][3], D[b][3], D[a][2], D[b][2], D[a][1], D[b][1], D[a][0], D[b][0]};
Status Flags
Examples
bmerge d0, d1, d2
See Also
BSPLIT
C Not set by this instruction.
V Not set by this instruction.
SV Not set by this instruction.
AV Not set by this instruction.
SAV Not set by this instruction.
31
c
28 27
01
H
20 19
-
18 17
0
H
16 15
b
12 11
a
8 7
4B
H
0
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