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Infineon TriCore TC1.6P - CMP.F - Compare Float

Infineon TriCore TC1.6P
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TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-401
CMP.F
Compare Float
Description
This instruction compares the IEEE-754-1985 single-precision floating-point operands and asserts bits in the
result if their associated condition is true:
bit [0] D[a] < D[b]
bit [1] D[a] == D[b]
bit [2] D[a] > D[b]
bit [3] Unordered
bit [4] D[a] is denormal
bit [5] D[b] is denormal
bits[31:06] are cleared.
The ‘unordered’ bit is asserted if either operand is a NaN.
Note:CMP.F is the only FPU instruction that does not substitute denormal operands for zero before computation.
CMP.FD[c], D[a], D[b] (RR)
D[c][0] = ieee754_lt(D[a], D[b]);
D[c][1] = ieee754_eq(D[a], D[b]);
D[c][2] = ieee754_gt(D[a], D[b]);
D[c][3] = (is_nan(D[a]) OR is_nan(D[b]));
D[c][4] = is_denorm(D[a]);
D[c][5] = is_denorm(D[b]);
Exception Flags
Examples
cmp.f d3, d1, d2
See Also
-
FS if(set_FI) then PSW.FS = 1 else PSW.FS = 0;
FI if(is_s_nan(D[a]) OR is_s_nan(D[b])) then set_FI = 1;
if(set_FI) then PSW.FI = 1;
FV Not set by this instruction.
FZ Not set by this instruction.
FU Not set by this instruction.
FX Not set by this instruction.
31
c
28 27
00
H
20 19
-
18 17
1
H
16 15
b
12 11
a
8 7
4B
H
0

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