Infineon TriCore TC1.6P - ST.W - Store Word

TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-362
ST.W
Store Word
Description
Store the word value in data register D[a] to the memory location specified by the addressing mode.
ST.Woff18, D[a] (ABS)(Absolute Addressing Mode)
EA = {off18[17:14], 14b'0, off18[13:0]};
M(EA, word) = D[a];
ST.WA[b], off10, D[a] (BO)(Base + Short Offset Addressing Mode)
EA = A[b] + sign_ext(off10);
M(EA, word) = D[a];
ST.WP[b], D[a] (BO)(Bit-reverse Addressing Mode)
index = zero_ext(A[b+1][15:0]);
incr = zero_ext(A[b+1][31:16]);
EA = A[b] + index;
M(EA, word) = D[a];
new_index = reverse16(reverse16(index) + reverse16(incr));
A[b+1] = {incr[15:0], new_index[15:0]};
ST.WP[b], off10, D[a] (BO)(Circular Addressing Mode)
index = zero_ext(A[b+1][15:0]);
length = zero_ext(A[b+1][31:16]);
EA0 = A[b] + index;
EA2 = A[b] + (index +2) % length;
M(EA0, halfword) = D[a][15:0];
M(EA2, halfword) = D[a][31:16];
new_index = index + sign_ext(off10);
Store the word value in either data register D[a] (instruction format SSR, SSRO) or D[15] (instruction format SRO,
SC) to the memory location specified by the addressing mode.
31
off18[9:6]
28 27
00
H
26 25
off18[13:10]
22 21
off18[5:0]
16 15
off18[17:14]
12 11
a
8 7
A5
H
0
31
off10[9:6]
28 27
24
H
22 21
off10[5:0]
16 15
b
12 11
a
8 7
89
H
0
31
-
28 27
04
H
22 21
-
16 15
b
12 11
a
8 7
A9
H
0
31
off10[9:6]
28 27
14
H
22 21
off10[5:0]
16 15
b
12 11
a
8 7
A9
H
0