TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-77
A[b+1] = {length[15:0], new_index[15:0]};
CMPSWAP.WA[b], off10, E[a] (BO)(Post-increment Addressing Mode)
EA = A[b];
tmp = M(EA, word);
M(EA, word) = (tmp == D[a+1]) ? D[a] : tmp;
D[a] = tmp;
A[b] = EA + sign_ext(off10);
CMPSWAP.WA[b], off10, E[a] (BO)(Pre-increment Addressing Mode)
EA = A[b] + sign_ext(off10);
tmp = M(EA, word);
M(EA, word) = (tmp == D[a+1]) ? D[a] : tmp;
D[a] = tmp;
A[b] = EA;
Status Flags
Examples
CMPSWAP.W e0, [a0+4]
See Also
LDMST, ST.T, SWAP.W, SWAPMSK.W
C Not set by this instruction.
V Not set by this instruction.
SV Not set by this instruction.
AV Not set by this instruction.
SAV Not set by this instruction.
31
off10[9:6]
28 27
03
H
22 21
off10[5:0]
16 15
b
12 11
a
8 7
49
H
0
31
off10[9:6]
28 27
13
H
22 21
off10[5:0]
16 15
b
12 11
a
8 7
49
H
0