Infineon TriCore TC1.6P - Page 138

TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-91
Examples
-
See Also
DVADJ, DVSTEP, DVSTEP.U
VDVINIT
if ((D[b] == 0) OR ((D[b] == 32’hFFFFFFFF) AND (D[a] == 32’h80000000))) then overflow = 1 else
overflow = 0;
DVINIT.U
if (D[b] == 0) then overflow = 1 else overflow = 0;
DVINIT.B
if ((D[b] == 0) OR ((D[b] == 32’hFFFFFFFF AND (D[a] == 32’hFFFFFF80)) then overflow = 1 else
overflow = 0;
DVINIT.BU
if (D[b]==0) then overflow = 1 else overflow = 0;
DVINIT.H
if ((D[b] == 0) OR ((D[b] == 32’hFFFFFFFF AND (D[a] == 32’hFFFF8000))) then overflow = 1 else
overflow=0;
DVINIT.HU
if (D[b] == 0) then overflow = 1 else overflow = 0;
For all the DVINIT variations:
if (overflow) then PSW.V = 1 else PSW.V = 0;
SV if (overflow) then PSW.SV = 1 else PSW.SV = PSW.SV;
AV PSW.AV = 0;
SAV Not set by these instructions.