Infineon TriCore TC1.6P - Page 216

TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-169
LD.WD[c], A[15], off4 (SLRO)
LD.WD[15], A[b], off4 (SRO)
Status Flags
Examples
ld.w d4, [a0+]2
ld.w d2, [a2+]22
See Also
LD.A, LD.B, LD.BU, LD.D, LD.DA, LD.H, LD.HU, LD.Q
D[c] = M(A[15] + zero_ext(4 * off4), word);
D[15] = M(A[b] + zero_ext(4 * off4), word);
C Not set by this instruction.
V Not set by this instruction.
SV Not set by this instruction.
AV Not set by this instruction.
SAV Not set by this instruction.
15
off4
12 11
c
8 7
48
H
0
15
b
12 11
off4
8 7
4C
H
0