Infineon TriCore TC1.6P - Page 246

TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-199
result_word0 = sc0 ? 7FFFFFFF
H
: ((D[a][15:0] * D[b][15:0]) << n);
result = E[d] + ((result_word1 + result_word0) << 16);
E[c] = result[63:0]; // Multi-precision accumulator
MADDM.HE[c], E[d], D[a], D[b] UU, n (RRR1)
64 + (16L * 16U) + (16U * 16U) --> 64
sc1 = (D[a][15:0] == 8000
H
) AND (D[b][31:16] == 8000
H
) AND (n == 1);
sc0 = (D[a][31:16] == 8000
H
) AND (D[b][31:16] == 8000
H
) AND (n == 1);
result_word1 = sc1 ? 7FFFFFFF
H
: ((D[a][15:0] * D[b][31:16]) << n);
result_word0 = sc0 ? 7FFFFFFF
H
: ((D[a][31:16] * D[b][31:16]) << n);
result = E[d] + ((result_word1 + result_word0) << 16);
E[c] = result[63:0]; // Multi-precision accumulator
MADDMS.HE[c], E[d], D[a], D[b] LL, n (RRR1)
64 + (16U * 16L) + (16L * 16L) --> 64 saturated
sc1 = (D[a][31:16] == 8000
H
) AND (D[b][15:0] == 8000
H
) AND (n == 1);
sc0 = (D[a][15:0] == 8000
H
) AND (D[b][15:0] == 8000
H
) AND (n == 1);
result_word1 = sc1 ? 7FFFFFFF
H
: ((D[a][31:16] * D[b][15:0]) << n);
result_word0 = sc0 ? 7FFFFFFF
H
: ((D[a][15:0] * D[b][15:0]) << n);
result = E[d] + ((result_word1 + result_word0) << 16);
E[c] = ssov(result, 64); // Multi-precision accumulator
MADDMS.HE[c], E[d], D[a], D[b] LU, n (RRR1)
64 + (16U * 16L) + (16L * 16U) --> 64 saturated
sc1 = (D[a][31:16] == 8000
H
) AND (D[b][15:0] == 8000
H
) AND (n == 1);
sc0 = (D[a][15:0] == 8000
H
) AND (D[b][31:16] == 8000
H
) AND (n == 1);
result_word1 = sc1 ? 7FFFFFFF
H
: ((D[a][31:16] * D[b][15:0]) << n);
result_word0 = sc0 ? 7FFFFFFF
H
: ((D[a][15:0] * D[b][31:16]) << n);
result = E[d] + ((result_word1 + result_word0) << 16);
E[c] = ssov(result, 64); // Multi-precision accumulator
MADDMS.HE[c], E[d], D[a], D[b] UL, n (RRR1)
64 + (16U * 16U) + (16L * 16L) --> 64 saturated
31
c
28 27
d
24 23
1F
H
18 17
n
16 15
b
12 11
a
8 7
83
H
0
31
c
28 27
d
24 23
3E
H
18 17
n
16 15
b
12 11
a
8 7
83
H
0
31
c
28 27
d
24 23
3D
H
18 17
n
16 15
b
12 11
a
8 7
83
H
0