Infineon TriCore TC1.6P - Page 275

TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-228
MOVD[a], const4 (SRC)
MOVE[a], const4 (SRC)
MOVD[a], D[b] (SRR)
Status Flags
Examples
mov d3, d1
mov d3, #-30000
mov e0, d5; e0 = sign_ext(d5)
mov e0, d6, d3; e0 = d6_d3 or d1=d6 d0=d3
mov e0, 1234H; e0 = 0000000000001234
H
D[15] = zero_ext(const8);
D[a] = sign_ext(const4);
E[a] = sign_ext(const4);
D[a] = D[b];
C Not set by this instruction.
V Not set by this instruction.
SV Not set by this instruction.
AV Not set by this instruction.
SAV Not set by this instruction.
mov d1, d2
mov d1, #6
mov d15, #126
mov e0, #EH; e0 = FFFFFFFFFFFFFFFE
H
15
const8
8 7
DA
H
0
15
const4
12 11
a
8 7
82
H
0
15
const4
12 11
a
8 7
D2
H
0
15
b
12 11
a
8 7
02
H
0