Infineon TriCore TC1.6P - Page 330

TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-283
result_word0 = sc0 ? 7FFFFFFF
H
: ((D[a][15:0] * D[b][15:0]) << n);
result = (result_word1 + result_word0) << 16;
E[c] = result[63:0]; // Multi-precision accumulator
MULM.HE[c], D[a], D[b] UU, n (RR1)
16L * 16U + 16U * 16U --> 64
sc1 = (D[a][15:0] == 8000
H
) AND (D[b][31:16] == 8000
H
) AND (n == 1);
sc0 = (D[a][31:16] == 8000
H
) AND (D[b][31:16] == 8000
H
) AND (n == 1);
result_word1 = sc1 ? 7FFFFFFF
H
: ((D[a][15:0] * D[b][31:16]) << n);
result_word0 = sc0 ? 7FFFFFFF
H
: ((D[a][31:16] * D[b][31:16]) << n);
result = (result_word1 + result_word0) << 16;
E[c] = result[63:0]; // Multi-precision accumulator
Status Flags
Examples
-
See Also
-
C Not set by this instruction.
V The PSW.V status bit is cleared.
SV Not set by this instruction.
AV The PSW.AV status bit is cleared.
SAV Not set by this instruction.
31
c
28 27
1F
H
18 17
n
16 15
b
12 11
a
8 7
B3
H
0