TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-311
} else {
// Normal
temp_exp = int_exp + 128;
}
fp_exp_frac[30:0] = {tmp_exp[7:0], int_mant[30:8]} + flag_rnd;
fp_exp = fp_exp_frac[30:23];
fp_frac = fp_exp_frac[22:0];
}
D[c][31] = D[a][31];
D[c][30:23] = fp_exp;
D[c][22:0] = fp_frac;
Status Flags
Examples
pack d8, e2, d10
See Also
UNPACK
C PSW.C is read by the instruction but not set by this instruction.
V Not set by this instruction.
SV Not set by this instruction.
AV Not set by this instruction.
SAV Not set by this instruction.